Today’s cellular communications industry is setting extremely stringent efficiency criteria for Power Amplifiers (PAs) used within wireless transmitters. To this end, various high-efficiency power amplifier architectures are exploited. Often these architectures require the transistors within PAs to be biased in high-efficiency class of operation, such as class B, C, E, F, J etc. and rely heavily on the correct current and voltage waveforms at the intrinsic transistor plane.

The design of such PAs mandates very accurate non-linear transistor models enabling time-domain waveform simulations under varying load impedances. Enhanced Poly-Harmonic Distortion (EPHD) transistor models are uniquely suited for such simulations as they are extracted from the time-domain current and voltage waveform information obtained during the large-signal analyzer-based load-pull measurements under variable load conditions.

This webinar will introduce the topic of load-pull, cover various conventional load-pull measurement techniques, large-signal analyzer based load-pull enabling the time-domain waveform measurements of active devices, and the enhanced poly-harmonic distortion transistor modelling methodology. Finally, the extracted device model will be simulated in a harmonic balance-based circuit simulator and compared against the measured results.

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